@book{ASA2024,
title = {Application-Specific Arithmetic},
author = {de Dinechin, Florent and Martin Kumm},
year = {2024},
url = {https://link.springer.com/book/10.1007/978-3-031-42808-1},
publisher = {Springer}
}
@article{bk23,
year = {2023},
title = {Towards Globally Optimal Design of Multipliers for {FPGAs}},
author = {Böttcher, Andreas and Kumm, Martin},
journal = {IEEE Transactions on Computers},
doi = {10.1109/tc.2023.3238128},
pages = {1261 -- 1273},
number = {5},
volume = {72}
}
@inproceedings{hhwmkz23,
year = {2023},
author = {Hardieck, Martin and Habermann, Tobias and Wagner, Fabian and Kumm, Martin and Mecik, Michael and Zipf, Peter},
title = {{More {AddNet}: A deeper insight into {DNN}s using {FPGA}-optimized multipliers}},
booktitle = {IEEE International Symposium on Circuits and Systems (ISCAS)},
doi = {10.1109/ISCAS46773.2023.10181827},
pages = {115--128},
volume = {28}
}
@inproceedings{VolkovaEtAlAsilomar2023,
title = {Hardware-optimal digital {FIR} filters: one {ILP} to rule them all and in faithfulness bind them},
author = {Anastasia Volkova and R\'emi Garcia and de Dinechin, Florent and Martin Kumm},
booktitle = {Asilomar Conference on Signals, Systems, and Computers},
year = {2023},
url = {https://inria.hal.science/hal-04398268},
month = feb
}
@inproceedings{Desrentes2022-FPT,
title = {{Using integer linear programming for correctly rounded multipartite architectures}},
author = {Desrentes, Or{\'e}gane and de Dinechin, Florent},
url = {https://hal.inria.fr/hal-03844218},
booktitle = {International Conference on Field Programmable Technology},
noaddress = {Hong Kong, China},
year = {2022},
month = dec,
pdf = {https://hal.inria.fr/hal-03844218/file/2022-mpt-ilp.pdf},
hal_id = {hal-03844218},
hal_version = {v1}
}
@inproceedings{bottcher2022-squarers,
title = {{Resource Optimal Squarers for FPGAs}},
author = {B{\"o}ttcher, Andreas and Kumm, Martin and de Dinechin, Florent},
url = {https://hal.inria.fr/hal-03922311},
booktitle = {{International Conference on Field-Programmable Logic and Applications (FPL)}},
noaddress = {Belfast, United Kingdom},
publisher = {{IEEE}},
year = {2022},
month = aug,
doi = {10.1109/FPL57034.2022.00018},
nokeywords = {squarer multiplier tiling compressor tree integer linear programming computer arithmetic ; squarer ; multiplier tiling ; compressor tree ; integer linear programming ; computer arithmetic},
pdf = {https://hal.inria.fr/hal-03922311/file/2022-FPL-Squarers.pdf},
hal_id = {hal-03922311},
hal_version = {v1}
}
@inproceedings{hkkv22,
year = {2022},
author = {Habermann, Tobias and Kühle, Jonas and Kumm, Martin and Volkova, Anastasia},
title = {Hardware-Aware Quantization for Multiplierless Neural Network Controllers},
booktitle = {IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)},
url = {https://hal.science/hal-03908463},
pages = {1---5}
}
@article{gvkgk22,
title = {Hardware-aware Design of Multiplierless Second-Order {IIR} Filters with Minimum Adders},
author = {Garcia, Remi and Volkova, Anastasia and Kumm, Martin and Goldsztejn, Alexandre and Kuhle, Jonas},
journal = {IEEE Transactions on Signal Processing},
issn = {1053-587X},
doi = {10.1109/tsp.2022.3161158},
year = {2022},
pages = {1673 -- 1686},
volume = {70}
}
@inproceedings{bkd21,
year = {2021},
author = {Böttcher, Andreas and Kumm, Martin and de Dinechin, Florent},
title = {Resource Optimal Truncated Multipliers for {FPGAs}},
doi = {10.1109/arith51176.2021.00029},
pages = {102--109},
url = {https://hal.science/hal-03220290v1},
booktitle = {IEEE Symposium on Computer Arithmetic (ARITH)}
}
@inproceedings{MurilloEtcPosit2020,
author = {Murillo, Raul and Del Barrio, Alberto A. and Botella, Guillermo},
booktitle = {2020 IEEE International Symposium on Circuits and Systems (ISCAS)},
title = {Customized Posit Adders and Multipliers using the {FloPoCo} Core Generator},
year = {2020},
nodoi = {10.1109/ISCAS45731.2020.9180771}
}
@inproceedings{deDinechin2019-10years,
author = {de Dinechin, Florent},
title = {Reflections on 10 years of {FloPoCo}},
booktitle = {26th IEEE Symposium of Computer Arithmetic (ARITH-26)},
year = {2019},
month = jun,
pdf = {https://hal.inria.fr/hal-02161527/document},
nopublisher = {IEEE}
}
@inproceedings{deDinechinEtAl2019-Arith-KCMvsSA,
author = {de Dinechin, Florent and Filip, Silviu-Ioan and Luc Forget and Martin Kumm},
title = {Table-Based versus Shift-And-Add constant multipliers for {FPGA}s},
booktitle = {26th IEEE Symposium of Computer Arithmetic (ARITH-26)},
year = {2019},
month = jun,
pdf = {https://hal.inria.fr/hal-02147078/document},
nopublisher = {IEEE}
}
@article{volkova:hal-01561052,
title = {Towards Hardware {IIR} Filters Computing Just Right: Direct Form {I} Case Study},
author = {Volkova, Anastasia and Istoan, Matei and de Dinechin, Florent and Hilaire, Thibault},
volume = 68,
number = 4,
journal = {IEEE Transactions on Computers},
nourl = {http://hal.upmc.fr/hal-01561052},
nodoi = {10.1109/TC.2018.2879432},
year = {2019},
month = apr,
pdf = {http://hal.upmc.fr/hal-01561052/file/LTICJR.pdf}
}
@inproceedings{BrisebarreEtAl2018-EMethod,
title = {A high throughput polynomial and rational function approximations evaluator},
author = {Brisebarre, Nicolas and Constantinides, George and Ercezovac, Milo{\v{s}} and Filip, Silviu-Ioan and I\c{s}toan, Matei and Muller, Jean-Michel},
booktitle = {25th Symposium on Computer Arithmetic (ARITH)},
pages = {99--106},
year = {2018},
organization = {IEEE}
}
@inproceedings{KummEtAl2018,
author = {Martin Kumm and Oscar Gustafsson and de Dinechin, Florent and Johannes Kappauf and Peter Zipf},
title = {{K}aratsuba with Rectangular Multipliers for {FPGA}s},
booktitle = {25th IEEE Symposium of Computer Arithmetic (ARITH-25)},
year = {2018},
month = jun,
note = {Best paper award},
nopublisher = {IEEE},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2018-Arith-rectangularKaratsuba.pdf}
}
@inproceedings{istoan:hal-01373937,
title = {Automating the pipeline of arithmetic datapaths},
author = {Istoan, Matei and de Dinechin, Florent},
url = {https://hal.inria.fr/hal-01373937},
booktitle = {DATE 2017},
address = {Lausanne, Switzerland},
year = {2017},
month = mar,
pdf = {https://hal.inria.fr/hal-01373937/file/flopoco_new_pipeline.pdf},
hal_id = {hal-01373937},
hal_version = {v2},
x-international-audience = {yes}
}
@inproceedings{KummEtAl,
author = {Martin Kumm and Johannes Kappauf and Matei Istoan and Peter Zipf},
title = {Resource Optimal Design of Large Multipliers for {FPGA}s},
booktitle = {24th Symposium of Computer Arithmetic},
year = {2017},
month = jul,
publisher = {IEEE},
nopdf = {}
}
@article{UgurdagEtAl2017,
author = {Ugurdag, H. Fatih and de Dinechin, Florent and Gener, Y. Serhan
and Sezer Gören and Didier, Laurent-Stéphane},
title = {Hardware division by small integer constants},
journal = {IEEE Transactions on Computers},
nopublisher = {IEEE},
year = 2017
}
@inproceedings{UgurdagEtAl2016,
author = {Ugurdag, H. Fatih and Anil Bayram and Levent, Vecdi Emre and Sezer Gören},
title = {Efficient Combinational Circuits for Division by Small Integer Constants},
booktitle = {23nd Symposium of Computer Arithmetic},
year = {2016},
month = jun,
publisher = {IEEE},
nopdf = {}
}
@inproceedings{DinIsto2015,
author = {de Dinechin, Florent and Matei Istoan},
title = {Hardware implementations of fixed-point {Atan2}},
booktitle = {22nd Symposium of Computer Arithmetic},
year = {2015},
month = jun,
publisher = {IEEE},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2015-Arith-FixAtan2.pdf}
}
@inproceedings{thomas-15-general-purpose-function-approximation,
title = {A general-purpose method for faithfully rounded
floating-point function approximation in {FPGAs}},
author = {David B. Thomas},
booktitle = {22d Symposium on Computer Arithmetic},
year = {2015},
publisher = {IEEE},
pdf = {http://cas.ee.ic.ac.uk/people/dt10/research/papers/2015/thomas-15-general-purpose-function-approximation.pdf}
}
@inproceedings{DinIstoMas2014-SOPCJR,
author = {de Dinechin, Florent and Matei Istoan and Abdelbassat Massouri},
title = {Sum-of-Product Architectures Computing Just Right},
booktitle = {Application-Specific Systems, Architectures and Processors (ASAP)},
year = 2014,
url = {http://hal.inria.fr/hal-00957609},
pdf = {http://hal.inria.fr/hal-00957609/PDF/SoPCCJR.pdf},
publisher = {IEEE}
}
@inproceedings{kz14a,
title = {{Efficient High Speed Compression Trees on Xilinx FPGAs}},
author = {Kumm, Martin and Zipf, Peter},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)},
year = {2014}
}
@inproceedings{kz14b,
title = {{Pipelined Compressor Tree Optimization Using Integer Linear Programming}},
author = {Kumm, Martin and Zipf, Peter},
booktitle = {IEEE International Conference on Field Programmable Logic and Application (FPL)},
year = {2014},
pages = {1--8},
publisher = {IEEE}
}
@inproceedings{mkkz14,
title = {{Pipelined reconfigurable multiplication with constants on FPGAs}},
author = {M{\"o}ller, Konrad and Kumm, Martin and Kleinlein, Marco and Zipf, Peter},
booktitle = {IEEE International Conference on Field Programmable Logic and Application (FPL)},
year = {2014},
pages = {1--6},
publisher = {IEEE}
}
@inproceedings{DinIstSer2013-FPL-BitHeap,
title = {Arithmetic core generation using bit heaps},
author = {Brunie, Nicolas and de Dinechin, Florent and Istoan, Matei and Sergent, Guillaume and Illyes, Kinga and Popa, Bogdan},
year = {2013},
month = sep,
booktitle = {Field-Programmable Logic and Applications},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2013-FPL-BitHeap.pdf}
}
@article{ThomasLuk2013-TVLSI-LUT-SR,
author = {Thomas, David B. and Wayne Luk},
title = {The {LUT-SR} Family of Uniform Random Number Generators for {FPGA} Architectures},
journal = {IEEE Transactions on VLSI Systems},
year = 2013,
volume = 21,
number = 4,
month = apr
}
@inproceedings{thomas-13-table-hadamard-grng,
title = {Parallel generation of {Gaussian} random numbers using the {Table-Hadamard} transform},
author = {Thomas, David B.},
booktitle = {FPGAs for custom computing machines},
year = {2013},
pdf = {http://cas.ee.ic.ac.uk/people/dt10/research/thomas-13-table-hadamard-rng.pdf}
}
@article{DinIstSer2013-HEART-SinCos,
title = {Fixed-Point Trigonometric Functions on {FPGA}s},
author = {de Dinechin, Florent and Istoan, Matei and Sergent, Guillaume},
journal = {SIGARCH Computer Architecture News},
volume = 41,
number = 5,
pages = {83-88},
year = 2013,
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2013-HEART-SinCos.pdf}
}
@article{DinechinEtAl-2013-power,
author = {de Dinechin, Florent and Pedro Echeverr\'{i}a and L\'opez-Vallejo, Marisa and Bogdan Pasca},
title = {Floating-Point Exponentiation Units for Reconfigurable Computing},
journal = {ACM Transactions on Reconfigurable Technology and Systems},
volume = 6,
number = 1,
year = 2013,
publisher = {ACM},
url = {http://dl.acm.org/citation.cfm?id=2457447},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2013-TRETS-Exponentiation.pdf}
}
@inbook{DinechinPasca2013:HPC,
author = {de Dinechin, Florent and Bogdan Pasca},
chapter = {Reconfigurable Arithmetic for High Performance Computing},
title = {High-Performance Computing using FPGAs},
noeditor = {V. Vanderbauwhede and K. Benkrid},
pages = {631--664},
publisher = {Springer},
year = {2013},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2013-Arith4HPC-chapter.pdf}
}
@inproceedings{dedinechin:2012:ensl-00642145:1,
author = {de Dinechin, Florent and Didier, Laurent-St{\'e}phane},
title = {Table-based division by small integer constants},
booktitle = {Applied Reconfigurable Computing},
year = {2012},
month = mar,
pages = {53-63},
address = {Hong Kong},
nourl = {http://hal.inria.fr/ensl-00642145/en},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2012-ARC-LUTConstDiv.pdf}
}
@article{Dinechin2012-TCASII,
author = {de Dinechin, Florent},
title = {Multiplication by rational constants},
journal = {{IEEE} Transactions on Circuits and Systems, II},
year = 2012,
volume = 52,
number = 2,
month = feb,
pages = {98--102},
url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6126071},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2012-TCASII-rational-constmult.pdf}
}
@inproceedings{klz12,
title = {{Reduced Complexity Single and Multiple Constant Multiplication in Floating Point Precision}},
author = {Kumm, Martin and Liebisch, Katharina and Zipf, Peter},
booktitle = {IEEE International Conference on Field Programmable Logic and Application (FPL)},
year = {2012},
pages = {255--261}
}
@inproceedings{kz12,
title = {{Hybrid Multiple Constant Multiplication for FPGAs}},
author = {Kumm, Martin and Zipf, Peter},
booktitle = {IEEE International Conference on Electronics, Circuits and Systems, (ICECS)},
year = {2012},
pages = {556--559}
}
@phdthesis{pasca:tel-00654121,
title = {{High-performance floating-point computing on reconfigurable circuits}},
author = {Pasca, Bogdan Mihai},
url = {https://tel.archives-ouvertes.fr/tel-00654121},
number = {2011ENSL0656},
school = {{Ecole normale sup{\'e}rieure de lyon - ENS LYON}},
year = {2011},
month = sep,
type = {Theses},
pdf = {https://tel.archives-ouvertes.fr/tel-00654121/file/PASCA_Bogdan_2011_-_These.pdf},
hal_id = {tel-00654121},
hal_version = {v2}
}
@article{DinechinPasca2011-DaT,
author = {de Dinechin, Florent and Pasca, Bogdan},
title = {Designing Custom Arithmetic Data Paths with {FloPoCo}},
journal = {{IEEE} Design \& Test of Computers},
volume = 28,
number = 4,
pages = {18-27},
year = 2011,
month = jul,
nourl = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5753874},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2011-DaT-FloPoCo.pdf}
}
@inproceedings{dedinechin:2011:ensl-00642164:1,
author = {de Dinechin, Florent},
title = {The arithmetic operators you will never see in a microprocessor},
booktitle = {20th Symposium on Computer Arithmetic},
year = {2011},
month = jul,
publisher = {IEEE},
pages = {pp 189-190},
noaddress = {Germany},
nourl = {http://hal.inria.fr/ensl-00642164/en},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2011-Arith-Operators4FPGA.pdf}
}
@inproceedings{Preusser2011,
title = {{FPGA}-Specific Arithmetic Optimizations of Short-Latency Adders},
author = {Nguyen, Hong Diep and Bogdan Pasca and Preußer, Thomas B.},
publisher = {{IEEE} },
booktitle = {Field Programmable Logic and Applications},
year = 2011,
pdf = {https://hal-ens-lyon.archives-ouvertes.fr/ensl-00542389/document}
}
@article{VouzisCollangeArnold2010,
author = {P. D. Vouzis and Caroline Collange and Mark G. Arnold},
title = {A Novel Cotransformation for {LNS} Subtraction},
journal = {Journal of Signal Processing Systems},
year = 2010,
volume = 58,
number = 1,
pages = {29-40}
}
@inproceedings{VazquezDinechin2010:FPT,
author = {Vazquez, Alvaro and de Dinechin, Florent},
title = {Efficient implementation of Parallel {BCD} Multiplication in {LUT}-6 {FPGA}s},
booktitle = {Field-Programmable Technology},
year = {2010},
pages = {126--133},
month = dec,
noaddress = {China Beijing},
url-hal = {http://hal.inria.fr/inria-00546028/en},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-FPT-BCDMult.pdf}
}
@inproceedings{DinechinPasca2010-FPT,
author = {de Dinechin, Florent and Bogdan Pasca},
title = {Floating-point exponential functions for {DSP}-enabled {FPGA}s},
pages = {110--117},
booktitle = {Field Programmable Technologies},
nourl = {http://prunel.ccsd.cnrs.fr/ensl-00506125/},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-FPT-Exp.pdf},
year = 2010,
month = dec
}
@article{BanDinPaTu2010:ACMCAN,
author = {Banescu, Sebastian and de Dinechin, Florent and Pasca, Bogdan and Tudoran, Radu},
title = {Multipliers for floating-point double precision and beyond on {FPGAs}},
journal = {ACM SIGARCH Computer Architecture News},
volume = {38},
issue = {4},
nomonth = sep,
year = 2010,
noissn = {0163-5964},
pages = {73--79},
numpages = {7},
url = {http://doi.acm.org/10.1145/1926367.1926380},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-HEART-Multipliers.pdf},
noacmid = {1926380},
publisher = {ACM},
nodoi = {http://doi.acm.org/10.1145/1926367.1926380},
noaddress = {New York, NY, USA},
nokeywords = {floating-point, multiplier, quadruple precision, truncated multiplier}
}
@techreport{2010-RR-FPLog,
author = {de Dinechin, Florent},
title = {A flexible floating-point logarithm for reconfigurable computers},
institution = {ENS-Lyon},
year = 2010,
url = {http://prunel.ccsd.cnrs.fr/ensl-00506122/},
type = {LIP Research Report RR2010-22}
}
@inproceedings{DinJolPas2010-poly,
author = {de Dinechin, Florent and Mioara Joldes and Bogdan Pasca},
title = {Automatic generation of polynomial-based hardware architectures for function evaluation},
booktitle = {Application-specific Systems, Architectures and Processors},
publisher = {IEEE},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-ASAP-Polynomials.pdf},
nourl = {http://prunel.ccsd.cnrs.fr/ensl-00470506/},
year = 2010
}
@inproceedings{BaDinPasTud2010,
author = {Sebastian Banescu and de Dinechin, Florent and Bogdan Pasca and Radu Tudoran},
title = {Multipliers for Floating-Point Double Precision and Beyond on {FPGA}s},
booktitle = {Highly-Efficient Accelerators and Reconfigurable Technologies},
nourl = {http://prunel.ccsd.cnrs.fr/ensl-00475781/},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-HEART-Multipliers.pdf},
year = 2010
}
@inproceedings{DinJolPasRev2010,
author = {de Dinechin, Florent and Mioara Joldes and Bogdan Pasca and Guillaume Revy},
title = {Multiplicative square root algorithms for {FPGA}s},
booktitle = {Field-Programmable Logic and Applications},
pages = {574--577},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-FPL-Sqrt.pdf},
year = 2010
}
@inproceedings{DinNguPas2010,
author = {de Dinechin, Florent and Nguyen, Hong Diep and Bogdan Pasca},
title = {Pipelined {FPGA} Adders},
booktitle = {Field-Programmable Logic and Applications},
pages = {422--427},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2010-FPL-Adders.pdf},
year = 2010
}
@inproceedings{DinechinKleinPasca2009:FPL,
title = {{G}enerating high-performance custom floating-point pipelines},
author = {de {D}inechin, {F}lorent and {K}lein, {C}ristian and {P}asca, {B}ogdan},
nokeywords = {architecture generator; floating-point; pipeline; computer arithmetic},
booktitle = {Field Programmable Logic and Applications},
publisher = {{IEEE} },
pages = {59--64},
nonote = {{RR} {LIP} 2009-16 },
audience = {internationale },
noday = 31,
month = aug,
year = 2009,
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2009-FPL-FloPoCo.pdf},
nourl = {http://prunel.ccsd.cnrs.fr/ensl-00379154/}
}
@inproceedings{DinechinPasca2009:FPL,
title = {{L}arge multipliers with fewer {DSP} blocks},
author = {de Dinechin, Florent and Pasca, Bogdan},
nokeywords = {{FPGA};reconfigurable computing;integer multiplier;{K}aratsuba-{O}fman},
affiliation = {{ARENAIRE} - {INRIA} {R}h{\^o}ne-{A}lpes / {LIP} {L}aboratoire de l'{I}nformatique du {P}arall{\'e}lisme - {INRIA} - {CNRS} : {UMR}5668 - {U}niversit{\'e} {C}laude {B}ernard - {L}yon {I} - {E}cole {N}ormale {S}up{\'e}rieure de {L}yon - {ENS} {L}yon },
publisher = {{IEEE} },
booktitle = {Field Programmable Logic and Applications},
audience = {internationale},
noday = 31,
month = aug,
pages = {250--255},
year = 2009,
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2009-FPL-Multipliers.pdf},
nourl = {http://prunel.ccsd.cnrs.fr/ensl-00356421/en/}
}
@inproceedings{BrisebarreMullerDinechin2008:ASAP,
author = {Nicolas Brisebarre and de Dinechin, Florent and Muller, Jean-Michel},
title = {Integer and Floating-Point Constant Multipliers for {FPGA}s},
booktitle = {Application-specific Systems, Architectures and Processors},
pages = {239--244},
publisher = {IEEE},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2008-ASAP-constmult.pdf},
year = {2008}
}
@inproceedings{DinechinPascaCret2008:FPT,
author = {de Dinechin, Florent and Bogdan Pasca and Octavian Cre\c{t} and Radu Tudoran},
title = {An {FPGA}-specific Approach to Floating-Point Accumulation and Sum-of-Products},
booktitle = {Field-Programmable Technologies},
pages = {33--40},
publisher = {IEEE},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2008-FPT-accumulation.pdf},
year = {2008}
}
@article{DetDin2008:tsi,
author = {Detrey, J\'er\'emie and de Dinechin, Florent},
title = {Fonctions \'el\'ementaires en virgule flottante pour les
acc\'el\'erateurs reconfigurables},
booktitle = {Architecture des Ordinateurs},
volume = 27,
number = 6,
pages = {673--698},
journal = {Technique et Science Informatiques},
publisher = {Lavoisier},
year = 2008
}
@phdthesis{Dinechin2007:hdr,
author = {de Dinechin, Florent},
title = {Mat\'eriel et logiciel pour l'\'evaluation de fonctions num\'eriques. Pr\'ecision, performance et validation},
howpublished = {Habilitation thesis},
nohowpublished = {M\'emoire d'habilitation \`a diriger les recherches},
publisher = {Universit\'e Claude Bernard - Lyon 1},
nomonth = jun,
pdf = {http://www.ens-lyon.fr/LIP/Pub/Rapports/HDR/HDR2007/HDR2007-01.pdf},
year = 2007
}
@techreport{CretDinechin2007:fpfpga,
author = {de Dinechin, Florent and Detrey, J\'er\'emie and Octavian Cre\c{t} and Radu Tudoran},
title = {When {FPGA}s are better at floating-point than microprocessors},
number = {ensl-00174627},
nourl = {http://prunel.ccsd.cnrs.fr/ensl-00174627},
note = {http://prunel.ccsd.cnrs.fr/ensl-00174627},
institution = {\'ENS Lyon},
year = 2007
}
@inproceedings{DetDin2007:FPL,
author = {Detrey, J\'er\'emie and de Dinechin, Florent},
title = {Floating-Point Trigonometric Functions for {FPGAs}},
booktitle = {Field-Programmable Logic and Applications},
publisher = {IEEE},
pages = {29-34},
year = 2007,
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2007-FPL-SinCos.pdf},
nomonth = aug,
location = {Amsterdam, Netherlands}
}
@inproceedings{DetDinPuj2007:Arith,
author = {J\'er\'emie Detrey and de Dinechin, Florent and Pujol, Xavier},
title = {Return of the hardware floating-point elementary function},
booktitle = {18th Symposium on Computer Arithmetic},
year = 2007,
location = {Montpellier, France},
longpublisher = {IEEE Computer Society Press},
publisher = {IEEE},
nomonth = jun,
pages = {161--168},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2007-Arith-ReturnHardFPFun.pdf}
}
@article{DetDin2007:JMM,
author = {J\'er\'emie Detrey and de Dinechin, Florent},
title = {Parameterized floating-point logarithm and exponential functions for {FPGAs}},
journal = {Microprocessors and Microsystems, Special Issue on {FPGA}-based Reconfigurable Computing},
volume = 31,
number = 8,
pages = {537--545},
nomonth = dec,
publisher = {Elsevier},
year = 2007,
doi = {10.1016/j.micpro.2006.02.008},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2006-JMM.pdf}
}
@phdthesis{Det:phd:2007,
author = {Detrey, J\'er\'emie},
title = {Arithm\'etiques r\'eelles sur {FPGA} : virgule fixe, virgule
flottante et syst\`eme logarithmique},
school = {\'Ecole Normale Sup\'erieure de Lyon},
address = {Lyon, France},
month = jan,
year = 2007,
url = {http://www.ens-lyon.fr/LIP/Pub/Rapports/PhD/PhD2007/PhD2007-01.pdf}
}
@article{DinTis2005:IEEETC,
author = {de~Dinechin, Florent and Tisserand, Arnaud},
title = {Multipartite table methods},
journal = {{IEEE} Transactions on Computers},
year = 2005,
volume = 54,
number = 3,
pages = {319--330},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2005-TC-Multipartite.pdf}
}
@inproceedings{DetDin2005:asap,
author = {Detrey, J\'er\'emie and de~Dinechin, Florent},
title = {Table-based polynomials for fast hardware function
evaluation},
longbooktitle = {16th Intl Conference on
Application-specific Systems, Architectures and Processors},
booktitle = {Application-specific Systems, Architectures and Processors},
publisher = {IEEE},
nonomonth = jul,
location = {Samos, Greece},
year = 2005,
pages = {328--333},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2005-ASAP.pdf}
}
@inproceedings{DetDin2005:asilomar,
author = {J\'er\'emie Detrey and de~Dinechin, Florent},
title = {A Parameterizable Floating-Point Logarithm Operator for {FPGA}s},
booktitle = {39th Asilomar Conference on Signals, Systems \& Computers},
year = 2005,
location = {Pacific Grove, California, USA},
nonomonth = nov,
publisher = {IEEE},
longpublisher = {IEEE Signal Processing Society},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2005-Asilomar.pdf}
}
@inproceedings{DetDin2005:fpt,
author = {J\'er\'emie Detrey and de~Dinechin, Florent},
title = {A Parameterized Floating-Point Exponential Function for {FPGA}s},
longbooktitle = {IEEE International Conference on Field-Programmable Technology (FPT'05)},
booktitle = {Field-Programmable Technology},
year = 2005,
location = {Singapore},
nomonth = dec,
publisher = {IEEE},
pdf = {http://perso.citi-lab.fr/fdedinec/recherche/publis/2005-FPT.pdf}
}
@inproceedings{bkk20,
author = {B{\"o}ttcher, Andreas and Kullmann, Keanu and Kumm, Martin},
title = {{Heuristics for the Design of Large Multipliers for FPGAs}},
booktitle = {IEEE Symposium on Computer Arithmetic (ARITH)},
year = {2020}
}
@inproceedings{swkk20,
author = {Sommer, Lukas and Weber, Lukas and Kumm, M and Koch, Andreas},
title = {{Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs}},
booktitle = {International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
year = {2020},
pages = {75--83},
publisher = {IEEE}
}
@inproceedings{hkmz19,
author = {Hardieck, Martin and Kumm, M and M{\"o}ller, Konrad and Zipf, Peter},
title = {{Reconfigurable Convolutional Kernels for Neural Networks on FPGAs}},
booktitle = {ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA)},
year = {2019},
pages = {43--52},
month = feb,
publisher = {ACM}
}
@article{gmk19,
author = {Garrido, Mario and M{\"o}ller, Konrad and Kumm, Martin},
title = {{World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s}},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
year = {2019}
}
@article{kk18,
author = {Kumm, Martin and Kappauf, Johannes},
title = {{Advanced Compressor Tree Synthesis for FPGAs}},
journal = {IEEE Transactions on Computers},
year = {2018},
volume = {67},
number = {8},
pages = {1078--1091}
}
@article{kggz16,
author = {Kumm, Martin and Gustafsson, Oscar and Garrido, Mario and Zipf, Peter},
title = {{Optimal Single Constant Multiplication using Ternary Adders}},
journal = {IEEE Transactions on Circuits and Systems II: Express Briefs},
year = {2018},
volume = {65},
number = {7},
pages = {928--932}
}
@inproceedings{hksz18,
author = {Hardieck, Martin and Kumm, M and Sittel, Patrick and Zipf, Peter},
title = {{Constant Matrix Multiplication with Ternary Adders}},
booktitle = {2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)},
year = {2018},
pages = {85--88},
publisher = {IEEE}
}
@article{khz17,
author = {Kumm, Martin and Hardieck, Martin and Zipf, Peter},
title = {{Optimization of Constant Matrix Multiplication with Low Power and High Throughput}},
journal = {IEEE Transactions on Computers},
year = {2017},
volume = {66},
number = {12},
pages = {2072--2080}
}
@article{mkkz16,
author = {M{\"o}ller, Konrad and Kumm, Martin and Kleinlein, Marco and Zipf, Peter},
title = {{Reconfigurable Constant Multiplication for FPGAs}},
journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
year = {2017},
volume = {36},
number = {6},
pages = {927--937}
}
@inproceedings{kkiz17,
author = {Kumm, M and Kappauf, Johannes and Istoan, Matei and Zipf, Peter},
title = {{Optimal Design of Large Multipliers for FPGAs}},
booktitle = {IEEE Symposium on Computer Arithmetic (ARITH)},
year = {2017},
pages = {131--138}
}
@inproceedings{kkz16,
author = {Kumm, M and Kleinlein, Marco and Zipf, Peter},
title = {{Efficient Sum of Absolute Difference Computation on FPGAs}},
booktitle = {IEEE International Conference on Field Programmable Logic and Application (FPL)},
year = {2016},
pages = {1--4},
address = {Lausanne}
}
@phdthesis{k15,
author = {Kumm, Martin},
title = {{Multiple Constant Multiplication Optimizations for Field Programmable Gate Arrays}},
school = {Springer Wiesbaden},
year = {2015},
address = {Wiesbaden},
month = oct
}
@inproceedings{kaz15,
author = {Kumm, M and Abbas, Shahid and Zipf, Peter},
title = {{An Efficient Softcore Multiplier Architecture for Xilinx FPGAs}},
booktitle = {IEEE Symposium on Computer Arithmetic (ARITH)},
year = {2015},
pages = {18--25}
}
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