FloPoCo

Circuits computing just right

FloPoCo received the Community Award of FPL 2017, the 27th International Conference on Field-Programmable Logic and Applications!
The best and most versatile free floating point unit out there is FloPoCo. (...) It outperforms even expensive professional solutions.

http://embdev.net/topic/215370

Try FloPoCo without installing it from our experimental web interface.

Version 5.0 is taking shape in the git, version 4.1.2 is still the latest stable release.

Installation instruction.

See the release notes

FPGA arithmetic the way it should be

FloPoCo is a generator of arithmetic cores (Floating-Point Cores, but not only) for FPGAs (but not only).

The first motto of FloPoCo is that arithmetic on FPGAs should not mimick processor arithmetic. By designing radically new operators, one may obtain more accurate results with less hardware in less time. This thesis was first detailed in this document.

The second motto of FloPoCo is to enable computing just right. All FloPoCo operators are

  1. fully parameterized in precision, so that your application may use just the precision it needs, and
  2. accurate to the last bit, so that your wires don't carry meaningless noise.
Internally, FloPoCo operators are carefully designed to ensure that no bit is computed that is not useful to the final result.

FloPoCo is not a library of operators, but a generator of operators written in C++. It inputs operator specifications, and outputs synthesizable VHDL.

While waiting for the next release (we are working on it, honest) you may want to read the 2-page paper Reflections on 10 years of FloPoCo.

Distribution

FloPoCo is open-source, contributions are welcome!

FloPoCo is distributed under the FloPoCo license. It is a modified AGPL, so that the code generated by FloPoCo is itself available under LGPL.

Do not hesitate to contact us to negociate a commercial license.

Documentation

Installation instructions (Linux, Mac, Windows).

List of operators with their command-line syntax

User and developer manual (pdf)

Publications related to FloPoCo

For some slides, see a FloPoCo tutorial at HiPEAC 2013.

Publications describing FloPoCo or FloPoCo operators

Publications using FloPoCo

How to cite FloPoCo

If you want to refer to a specific operator, please cite the publication that describes it, if it exists.

Otherwise, or if you want to refer to the framework, or the project as a whole, please cite publication below:

Florent de Dinechin and Bogdan Pasca. Designing custom arithmetic data paths with FloPoCo. IEEE Design & Test of Computers, 28(4):18--27, July 2011. [ bib | .pdf ]

A shorter and more recent overview of the project: Florent de Dinechin. Reflections on 10 years of FloPoCo. In 26th IEEE Symposium of Computer Arithmetic (ARITH-26), June 2019. [ bib | pdf ]

Authors and credits

FloPoCo is managed by Florent de Dinechin (contact: Florent.de-Dinechin at insa-lyon.fr) and Martin Kumm (contact: martin.kumm at cs.hs-fulda.de).

Developers: Hatam Abdoli, Sebastian Banescu, Louis Besème, Andreas Böttcher, Nicolas Bonfante, Nicolas Brunie, Romain Bouarah, Victor Capelle, Jiajie Chen, Maxime Christ, Caroline Collange, Quentin Corradi, Florent de Dinechin, Orégane Desrentes, Jérémie Detrey, Antonin Dudermel, Fabrizio Ferrandi, Nicolai Fiege, Luc Forget, Martin Hardieck, Valentin Huguet, Kinga Illyes, Matei Iştoan, Mioara Joldeş, Johannes Kappauf, Cristian Klein, Marco Kleinlein, Kilian Klug, Martin Kumm, Jonas Kühle, Keanu Kullmann, Louis Ledoux, Jean Marchal, Antoine Martinet, Konrad Möller, Raul Murillo, Annika Oeste, Bogdan Pasca, Bogdan Popa, Xavier Pujol, Guillaume Sergent, Viktor Schmidt, David Thomas, Radu Tudoran, Alvaro Vasquez, Anastasia Volkova

Some of FloPoCo's operator code is based on FPLibrary and HOTBM code by Jérémie Detrey.

The following people have contributed to FloPoCo in some way (bug reports, porting, etc): Greg Davey, Mariusz Grad, Daniele Mastrandrea, Pedro Echeverría Aramendi.

FloPoCo uses Sollya, ScaLP, WCPGlib, and relies heavily on GMP and MPFR.

FloPoCo is essentially developed using Free Software. Special thanks to the NVC project for providing us a perfectly useable VHDL simulator.

The following support is gratefully acknowledged